document number: 91227 www.vishay.com s11-0444-rev. b, 14-mar-11 1 this datasheet is subject to change without notice. the product described here in and this datasheet are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 power mosfet irfp360lc, sihfp360lc vishay siliconix features ? ultra low gate charge ? reduced gate drive requirement ? enhanced 30 v v gs rating ? reduced c iss , c oss , c rss ? isolated central mounting hole ? dynamic dv/dt rated ? repetitive avalanche rated ? compliant to rohs directive 2002/95/ec description t his new series of low charge power mosfets achieve significantly lower gate charge over convertional mosfets. utilizing advanced mosfets technology the device improvements allow for reduce d gate drive requirements, faster switching speeds and increased total system savings. these device improvements combined with the proven ruggedness and reliability of mo sfets offer the designer a new standard in power transist ors for switching applications. the to-247ac package is preferred for commercial-industrial applications where higher power levels preclude the use of to-220ab devices. the to-247ac is similar but superior to the earlier to-218 package because of its isolated mounting hole. notes a. repetitive rating; pulse widt h limited by maximum junction temperature (see fig. 11). b. v dd = 25 v, starting t j = 25 c, l = 4.0 mh, r g = 25 , i as = 23 a (see fig. 12). c. i sd 23 a, di/dt 170 a/s, v dd v ds , t j 150 c. d. 1.6 mm from case. product summary v ds (v) 400 r ds(on) ( )v gs = 10 v 0.20 q g (max.) (nc) 110 q gs (nc) 28 q gd (nc) 45 configuration single n-channel mosfet g d s to-247ac g d s rohs* compliant ordering information package to-247ac lead (pb)-free irfp360lcpbf sihfp360lc-e3 snpb irfp360lc sihfp360lc absolute maximum ratings (t c = 25 c, unless otherwise noted) parameter symbol limit unit drain-source voltage v ds 400 v gate-source voltage v gs 30 continuous drain current v gs at 10 v t c = 25 c i d 23 a t c = 100 c 14 pulsed drain current a i dm 91 linear derating factor 2.2 w/c single pulse avalanche energy b e as 1200 mj repetitive avalanche current a i ar 23 a repetitive avalanche energy a e ar 28 mj maximum power dissipation t c = 25 c p d 280 w peak diode recovery dv/dt c dv/dt 4.0 v/ns operating junction and storage temperature range t j , t stg - 55 to + 150 c soldering recommendations (p eak temperature) for 10 s 300 d mounting torque 6-32 or m3 screw 10 lbf in 1.1 n m * pb containing terminations are not rohs compliant, exemptions may apply
www.vishay.com document number: 91227 2 s11-0444-rev. b, 14-mar-11 this datasheet is subject to change without notice. the product described here in and this datasheet are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 irfp360lc, sihfp360lc vishay siliconix notes a. repetitive rating; pulse widt h limited by maximum junction temperature (see fig. 11). b. pulse width 300 s; duty cycle 2 %. thermal resistance ratings parameter symbol typ. max. unit maximum junction-to-ambient r thja -40 c/w case-to-sink, flat, greased surface r thcs 0.24 - maximum junction-to-case (drain) r thjc -0.45 specifications (t j = 25 c, unless otherwise noted) parameter symbol test cond itions min. typ. max. unit static drain-source brea kdown voltage v ds v gs = 0 v, i d = 250 a 400 - - v v ds temperature coefficient v ds /t j reference to 25 c, i d = 1 ma - 0.49 - v/c gate-source threshold voltage v gs(th) v ds = v gs , i d = 250 a 2.0 - 4.0 v gate-source leakage i gss v gs = 20 v - - 100 na zero gate voltage drain current i dss v ds = 400 v, v gs = 0 v - - 25 a v ds = 320 v, v gs = 0 v, t j = 125 c - - 250 drain-source on-state resistance r ds(on) v gs = 10 v i d = 14 a b --0.20 forward transconductance g fs v ds = 50 v, i d = 14 a b 13 - - s dynamic input capacitance c iss v gs = 0 v, v ds = 25 v, f = 1.0 mhz, see fig. 5 - 3400 - pf output capacitance c oss - 540 - reverse transfer capacitance c rss -42- total gate charge q g v gs = 10 v i d = 23 a, v ds = 320 v, see fig. 6 and 13 b - - 110 nc gate-source charge q gs --28 gate-drain charge q gd --45 turn-on delay time t d(on) v dd = 200 v, i d = 23 a , r g = 4.3 , r d = 7.9 , see fig. 10 b -16- ns rise time t r -75- turn-off delay time t d(off) -42- fall time t f -50- internal drain inductance l d between lead, 6 mm (0.25") from package and center of die contact -5.0- nh internal source inductance l s -13- drain-source body diode characteristics continuous source-dr ain diode current i s mosfet symbol showing the integral reverse p - n junction diode --23 a pulsed diode forward current a i sm --92 body diode voltage v sd t j = 25 c, i s = 23 a, v gs = 0 v b --1.8v body diode reverse recovery time t rr t j = 25 c, i f = 23 a, di/dt = 100 a/s b - 400 600 ns body diode reverse recovery charge q rr -5.78.6c forward turn-on time t on intrinsic turn-on time is negligible (turn-on is dominated by l s and l d ) d s g s d g
document number: 91227 www.vishay.com s11-0444-rev. b, 14-mar-11 3 this datasheet is subject to change without notice. the product described here in and this datasheet are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 irfp360lc, sihfp360lc vishay siliconix typical characteristics (25 c, unless otherwise noted) fig. 1 - typical output characteristics, t c = 25 c fig. 2 - typical output characteristics, t c = 150 c fig. 3 - typical transfer characteristics fig. 4 - normalized on-resistance vs. temperature
www.vishay.com document number: 91227 4 s11-0444-rev. b, 14-mar-11 this datasheet is subject to change without notice. the product described here in and this datasheet are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 irfp360lc, sihfp360lc vishay siliconix fig. 5 - typical capacitance vs. drain-to-source voltage fig. 6 - typical gate charge vs. gate-to-source voltage fig. 7 - typical source-drain diode forward voltage fig. 8 - maximum safe operating area
document number: 91227 www.vishay.com s11-0444-rev. b, 14-mar-11 5 this datasheet is subject to change without notice. the product described here in and this datasheet are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 irfp360lc, sihfp360lc vishay siliconix fig. 9 - maximum drain current vs. case temperature fig. 10a - switching time test circuit fig. 10b - switching time waveforms fig. 11 - maximum effective transient thermal impedance, junction-to-case pulse width 1 s duty factor 0.1 % r d v gs r g d.u.t. 10 v + - v ds v dd v ds 90 % 10 % v gs t d(on) t r t d(off) t f
www.vishay.com document number: 91227 6 s11-0444-rev. b, 14-mar-11 this datasheet is subject to change without notice. the product described here in and this datasheet are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 irfp360lc, sihfp360lc vishay siliconix fig. 12a - unclamped inductive test circuit fig. 12b - unclamped inductive waveforms fig. 12c - maximum avalanche energy vs. drain current fig. 13a - basic gate charge waveform fig. 13b - gate charge test circuit r g i as 0.01 t p d.u.t l v ds + - v dd 10 v var y t p to obtain required i as i as v ds v dd v ds t p q gs q gd q g v g charge v gs d.u.t. 3 ma v gs v ds i g i d 0.3 f 0.2 f 50 k 12 v current regulator current sampling resistors same type as d.u.t. + -
document number: 91227 www.vishay.com s11-0444-rev. b, 14-mar-11 7 this datasheet is subject to change without notice. the product described here in and this datasheet are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 irfp360lc, sihfp360lc vishay siliconix fig. 14 - for n-channel vishay siliconix maintains worldw ide manufacturing capability. prod ucts may be manufactured at on e of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents su ch as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91227 . p.w. period di/dt diode recovery dv/dt ripple 5 % body diode forward drop re-applied voltage rever s e recovery current body diode forward current v gs = 10 v a i s d driver gate drive d.u.t. l s d waveform d.u.t. v d s waveform inductor current d = p.w. period + - + + + - - - peak dio d e recovery d v/ d t test circuit v dd ? dv/dt controlled by r g ? driver s ame type a s d.u.t. ? i s d controlled by duty factor d ? d.u.t. - device under te s t d.u.t. circuit layout con s ideration s ? low s tray inductance ? g round plane ? low leakage inductance current tran s former r g note a. v gs = 5 v for logic level device s v dd
package information www.vishay.com vishay siliconix revision: 01-jul-13 1 document number: 91360 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 to-247ac (high voltage) notes 1. dimensioning and tolera ncing per asme y14.5m-1994. 2. contour of slot optional. 3. dimension d and e do not include mold fl ash. mold flash shall not ex ceed 0.127 mm (0.005") per side . these dimens ions are mea sured at the outermost extremes of the plastic body. 4. thermal pad contour optional with dimensions d1 and e1. 5. lead finish un controlled in l1. 6. ? p to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154"). 7. outline conforms to jedec outline to-247 with exceptio n of dimension c. 8. xian and mingxin actually photo. millimeters inches millimeters inches dim. min. max. min. max. dim. min. max. min. max. a 4.58 5.31 0.180 0.209 d2 0.51 1.30 0.020 0.051 a1 2.21 2.59 0.087 0.102 e 15.29 15.87 0.602 0.625 a2 1.17 2.49 0.046 0.098 e1 13.72 - 0.540 - b 0.99 1.40 0.039 0.055 e 5.46 bsc 0.215 bsc b1 0.99 1.35 0.039 0.053 ? k 0.254 0.010 b2 1.53 2.39 0.060 0.094 l 14.20 16.25 0.559 0.640 b3 1.65 2.37 0.065 0.093 l1 3.71 4.29 0.146 0.169 b4 2.42 3.43 0.095 0.135 n 7.62 bsc 0.300 bsc b5 2.59 3.38 0.102 0.133 ? p 3.51 3.66 0.138 0.144 c 0.38 0.86 0.015 0.034 ? p1 - 7.39 - 0.291 c1 0.38 0.76 0.015 0.030 q 5.31 5.69 0.209 0.224 d 19.71 20.82 0.776 0.820 r 4.52 5.49 0.178 0.216 d1 13.08 - 0.515 - s 5.51 bsc 0.217 bsc ecn: x13-0103-rev. d, 01-jul-13 dwg: 5971 0.10 a c m m e e/2 (2) (4) r/2 b 2 x r s d see view b 2 x e b4 3 x b 2 x b2 l c l1 1 2 3 q d a a2 a a a1 c ? k b d m m a ?p (datum b) ?p1 d1 4 e1 0.01 b d m m view a - a thermal pad d2 dde e c c view b (b1, b3, b5) base metal c1 (b, b2, b4) section c - c, d - d, e - e (c) planting 4 3 5 7 4 4 4 lead assignments 1. gate 2. drain 3. source 4. drain
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